VPK180
VPK180 is an FPGA development board from AMD Xilinx, built around the XCVP1802-2MSELSVC4072.
- MPN: VPK180
- Type: FPGA development board
- Vendor: AMD Xilinx
- Device: XCVP1802-2MSELSVC4072
- Status: active
- Price: 17995 USD
- Product page: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/vpk180.html
- Catalog page: https://boards.fpgadeveloper.com/boards/VPK180
- Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json
Specifications
- Memory:
- Type: LPDDR4; Size Mb: 12288
- Clocking:
- Programmable: Yes
- Networking:
- SFP Dd: 4
- QSFP Dd: 6
- OSFP: 1
- Ethernet:
- Speed: 1000; Ports: 2
- USB Bridge:
- Connector: Type-C
- Functions:
- jtag
- uart
- Connector: Type-A
- Functions:
- uart
- Expansion:
- FMC:
- Slot: FMCP; Type: fmcp; Vadj Min: 1.2; Vadj Max: 1.5
- Storage:
- Microsd: 1
- User I/O:
- Leds: 4
- Pushbuttons: 2
- Dip Switches: 4
- Features:
- Power Monitoring: Yes
- Programmable Vadj: Yes
Device Attributes
Resources
- LUTs: 3,360,896
- Flip-Flops: 6,721,792
- Block RAM (36Kb): 4,941
- UltraRAM: 2,549
- DSP Slices: 14,352
- MMCMs: 13
- XPIO Pins: 703
- Transceivers: 140 (GTM, 112.0 Gb/s max)
- Transceivers: 12 (GTYP, 32.75 Gb/s max)
Vivado
- Tool Part: xcvp1802-lsvc4072-2ms-e
- ML Standard Support: No
Compatibility
Compatible FMC cards
- 2x QSFP28 FMC (OP120) — compatible, slot FMCP, verified
- Ethernet FMC Max (OP080) — compatible, slot FMCP, verified
- FPGA Drive FMC Gen4 (OP063) — compatible, slot FMCP, verified
- M.2 M-key Stack FMC (OP073) — compatible, slot FMCP, verified
- MCIO PCIe FMC (OP103) — compatible, slot FMCP, verified
- Quad SFP28 FMC (OP081) — compatible, slot FMCP, verified
- FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot FMCP, mechanical
- RPi Camera FMC (OP068) — compatible, slot FMCP, mechanical
Notes
VADJ_FMC supports 1.2 V / 1.5 V (discrete values; default 1.5 V, rail set to 0 V if no compatible voltage is found). Set at boot by the ZU4 System Controller (XCZU4) per ANSI/VITA 57.4 after reading the FMC card's IPMI EEPROM; the system controller user interface allows the IPMI routine to be overridden with an explicit value.
--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*