VCU108
VCU108 is an FPGA development board from AMD Xilinx, built around the XCVU095-2FFVA2104E.
- MPN: VCU108
- Type: FPGA development board
- Vendor: AMD Xilinx
- Device: XCVU095-2FFVA2104E
- Status: active
- Price: 11995 USD
- Product page: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/ek-u1-vcu108-g.html
- Catalog page: https://boards.fpgadeveloper.com/boards/VCU108
- Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json
Specifications
- Memory:
- Type: DDR4; Size Mb: 2560; Width Bits: 80; Ecc: Yes
- Type: DDR4; Size Mb: 2560; Width Bits: 80; Ecc: Yes
- Type: RLD3; Size Mb: 144; Width Bits: 72
- Flash:
- Type: BPI; Size Mb: 128; Width Bits: 16
- Clocking:
- Programmable: Yes
- Sma Clock In: 2
- PCIe:
- Type: Edge; Gen: 3; Lanes: 8
- High Speed I/O:
- Form: BullsEye; Lanes: 4; Transceiver: GTY
- Video:
- HDMI Out: 1
- Networking:
- Qsfp28: 1
- Cfp2: 1
- Ethernet:
- Speed: 1000; Ports: 1
- USB Bridge:
- Connector: Micro-B
- Functions:
- jtag
- Connector: Micro-B
- Functions:
- uart
- Expansion:
- Pmod: 1
- Xadc Header: 1
- FMC:
- Slot: HPC0; Type: hpc; Vadj Min: 1.2; Vadj Max: 1.8
- Slot: HPC1; Type: hpc; Vadj Min: 1.2; Vadj Max: 1.8
- Storage:
- Microsd: 1
- User I/O:
- Leds: 8
- Pushbuttons: 5
- Dip Switches: 4
- Features:
- Power Monitoring: Yes
Device Attributes
Resources
- LUTs: 537,600
- Flip-Flops: 1,075,200
- Block RAM (36Kb): 1,728
- DSP Slices: 768
- MMCMs: 16
- HR I/O Pins: 54
- HP I/O Pins: 795
- Transceivers: 28 (GTH, 16.375 Gb/s max)
- Transceivers: 24 (GTY, 28.21 Gb/s max)
Vivado
- Tool Part: xcvu095-ffva2104-2-e
- ML Standard Support: No
Compatibility
Compatible FMC cards
- Ethernet FMC 1.8V (OP031-1V8) — compatible, slot HPC0, verified
- Ethernet FMC 1.8V (OP031-1V8) — compatible, slot HPC1, verified
- Ethernet FMC Max (OP080) — compatible, slot HPC0, verified
- Ethernet FMC Max (OP080) — compatible, slot HPC1, verified
- FPGA Drive FMC Gen4 (OP063) — compatible, slot HPC0, verified
- FPGA Drive FMC Gen4 (OP063) — compatible, slot HPC1, verified
- M.2 M-key Stack FMC (OP073) — compatible, slot HPC0, verified
- M.2 M-key Stack FMC (OP073) — compatible, slot HPC1, verified
- MCIO PCIe FMC (OP103) — compatible, slot HPC0, verified
- MCIO PCIe FMC (OP103) — compatible, slot HPC1, verified
- Quad SFP28 FMC (OP081) — compatible, slot HPC0, verified
- Quad SFP28 FMC (OP081) — compatible, slot HPC1, verified
- Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot HPC0, verified
- Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot HPC1, verified
- 2x QSFP28 FMC (OP120) — compatible, slot HPC0, mechanical
- 2x QSFP28 FMC (OP120) — compatible, slot HPC1, mechanical
- FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot HPC0, mechanical
- FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot HPC1, mechanical
- RPi Camera FMC (OP068) — compatible, slot HPC0, mechanical
- RPi Camera FMC (OP068) — compatible, slot HPC1, mechanical
- FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC0, mechanical
- FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC1, mechanical
Notes
Configuration
Boot mode is determined by DIP switch SW16.
| Config mode | 1 | 2 | 3 | 4 | 5 |
|---|
| Master BPI | x | x | 0 | 1 | 0 |
| JTAG | x | x | 1 | 0 | 1 |
Switches 1 and 2 determine which of four possible configuration bitstreams to load from Master BPI flash. They are connected to A25 and A24 of the flash memory.
--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*