VC707
VC707 is an FPGA development board from AMD Xilinx, built around the XC7VX485T-2FFG1761C.
- MPN: VC707
- Type: FPGA development board
- Vendor: AMD Xilinx
- Device: XC7VX485T-2FFG1761C
- Status: active
- Price: 5995 USD
- Product page: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/ek-v7-vc707-g.html
- Catalog page: https://boards.fpgadeveloper.com/boards/VC707
- Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json
Specifications
- Memory:
- Type: DDR3; Size Mb: 1024; Form Factor: sodimm
- Flash:
- Type: BPI; Size Mb: 128; Width Bits: 16
- Type: QSPI; Size Mb: 16
- Clocking:
- Programmable: Yes
- Sma Clock In: 2
- PCIe:
- Type: Edge; Gen: 2; Lanes: 8
- High Speed I/O:
- Form: SMA; Lanes: 1
- Video:
- HDMI Out: 1
- Display:
- Character Lcd: 2x16
- Networking:
- SFP Plus: 1
- Ethernet:
- Speed: 1000; Ports: 1
- USB:
- Connector: Mini-B; Speed: 2.0; Role: otg
- USB Bridge:
- Connector: Micro-B
- Functions:
- jtag
- Connector: Mini-B
- Functions:
- uart
- Expansion:
- GPIO Header: 1
- Xadc Header: 1
- FMC:
- Slot: HPC1; Type: hpc; Vadj Min: 1.2; Vadj Max: 1.8
- Slot: HPC2; Type: hpc; Vadj Min: 1.2; Vadj Max: 1.8
- Storage:
- SD: 1
- User I/O:
- Leds: 8
- Pushbuttons: 5
- Dip Switches: 8
- Rotary Encoders: 1
- Features:
- Power Monitoring: Yes
Device Attributes
Resources
- LUTs: 303,600
- Flip-Flops: 607,200
- Block RAM (36Kb): 1,030
- DSP Slices: 2,800
- MMCMs: 14
- HP I/O Pins: 700
- Transceivers: 28 (GTX, 10.3125 Gb/s max)
Vivado
- Tool Part: xc7vx485tffg1761-2
- ML Standard Support: No
Compatibility
Compatible FMC cards
- Ethernet FMC 1.8V (OP031-1V8) — compatible, slot HPC1, verified
- Ethernet FMC 1.8V (OP031-1V8) — compatible, slot HPC2, verified
- Ethernet FMC Max (OP080) — compatible, slot HPC1, verified
- Ethernet FMC Max (OP080) — compatible, slot HPC2, verified
- FPGA Drive FMC Gen4 (OP063) — compatible, slot HPC1, verified
- FPGA Drive FMC Gen4 (OP063) — compatible, slot HPC2, verified
- M.2 M-key Stack FMC (OP073) — compatible, slot HPC1, verified
- M.2 M-key Stack FMC (OP073) — compatible, slot HPC2, verified
- MCIO PCIe FMC (OP103) — compatible, slot HPC1, verified
- MCIO PCIe FMC (OP103) — compatible, slot HPC2, verified
- Quad SFP28 FMC (OP081) — compatible, slot HPC1, verified
- Quad SFP28 FMC (OP081) — compatible, slot HPC2, verified
- Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot HPC1, verified
- Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot HPC2, verified
- 2x QSFP28 FMC (OP120) — compatible, slot HPC1, mechanical
- 2x QSFP28 FMC (OP120) — compatible, slot HPC2, mechanical
- FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot HPC1, mechanical
- FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot HPC2, mechanical
- RPi Camera FMC (OP068) — compatible, slot HPC1, mechanical
- RPi Camera FMC (OP068) — compatible, slot HPC2, mechanical
- FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC1, mechanical
- FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC2, mechanical
Notes
Configuration
FPGA configuration is determined by DIP switch SW11.
| Config mode | 1 | 2 | 3 | 4 | 5 |
|---|
| Master BPI | Note 4 | Note 4 | 0 | 1 | 0 |
| JTAG (independent) | X | X | 1 | 0 | 1 |
Notes:
1. X = don't care 2. 0 = OFF position 3. 1 = ON position 4. Switches 1 and 2 are A25 and A24 respectively and determine which of 4 bitstreams is booted from the Linear BPI flash
--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*