NetFPGA-SUME
NetFPGA-SUME is an FPGA development board from Digilent, built around the XC7VX690T-3FFG1761C.
- MPN: NetFPGA-SUME
- Type: FPGA development board
- Vendor: Digilent
- Device: XC7VX690T-3FFG1761C
- Status: discontinued
- Product page: https://netfpga.org/NetFPGA-SUME.html
- Catalog page: https://boards.fpgadeveloper.com/boards/NetFPGA-SUME
- Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json
Specifications
- Memory:
- Type: DDR3; Size Mb: 4096; Form Factor: sodimm
- Type: DDR3; Size Mb: 4096; Form Factor: sodimm
- Type: QDR-II+; Size Mb: 9; Width Bits: 36
- Type: QDR-II+; Size Mb: 9; Width Bits: 36
- Type: QDR-II+; Size Mb: 9; Width Bits: 36
- Flash:
- Type: SPI; Size Mb: 64
- Type: SPI; Size Mb: 64
- PCIe:
- Type: Edge; Gen: 3; Lanes: 8
- Networking:
- SFP Plus: 4
- Expansion:
- Pmod: 1
- FMC:
- Slot: HPC; Type: hpc; Vadj Min: 1.8; Vadj Max: 1.8
- Storage:
- Sata: 2
- Microsd: 1
- Features:
- Power Monitoring: Yes
Device Attributes
Resources
- LUTs: 433,200
- Flip-Flops: 866,400
- Block RAM (36Kb): 1,470
- DSP Slices: 3,600
- MMCMs: 20
- HP I/O Pins: 850
- Transceivers: 36 (GTH, 13.1 Gb/s max)
Vivado
- Tool Part: xc7vx690tffg1761-3
- ML Standard Support: No
Compatibility
Compatible FMC cards
- 2x QSFP28 FMC (OP120) — compatible, slot HPC, mechanical
- Ethernet FMC Max (OP080) — compatible, slot HPC, mechanical
- FPGA Drive FMC Gen4 (OP063) — compatible, slot HPC, mechanical
- M.2 M-key Stack FMC (OP073) — compatible, slot HPC, mechanical
- MCIO PCIe FMC (OP103) — compatible, slot HPC, mechanical
- Quad SFP28 FMC (OP081) — compatible, slot HPC, mechanical
- FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC, mechanical
Notes
VADJ is fixed at 1.8 V — the FMC VADJ pins are tied directly to the board's VCC1V8 rail, and all FPGA I/O routed to the FMC connector supports 1.8 V logic only. There is no jumper or programmable regulator for VADJ; FMC modules requiring a different VADJ voltage are electrically incompatible.
--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*