KC705

KC705 is an FPGA development board from AMD Xilinx, built around the XC7K325T-2FFG900C.

• MPN: KC705
• Type: FPGA development board
• Vendor: AMD Xilinx
• Device: XC7K325T-2FFG900C
• Status: active
• Price: 2995 USD
• Product page: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/ek-k7-kc705-g.html
• Catalog page: https://boards.fpgadeveloper.com/boards/KC705
• Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json

Specifications

• Memory:
• Type: DDR3; Size Mb: 1024; Form Factor: sodimm
• Flash:
• Type: BPI; Size Mb: 128; Width Bits: 16
• Type: QSPI; Size Mb: 16
• Clocking:
• Programmable: Yes
• Sma Clock In: 2
• PCIe:
• Type: Edge; Gen: 2; Lanes: 8
• High Speed I/O:
• Form: SMA; Lanes: 1
• Video:
• HDMI Out: 1
• Display:
• Character Lcd: 2x16
• Networking:
• SFP Plus: 1
• Ethernet:
• Speed: 1000; Ports: 1
• USB Bridge:
• Connector: Micro-B
• Functions:
• jtag
• Connector: Mini-B
• Functions:
• uart
• Expansion:
• Xadc Header: 1
• FMC:
• Slot: HPC; Type: hpc; Vadj Min: 1.8; Vadj Max: 3.3
• Slot: LPC; Type: lpc; Vadj Min: 1.8; Vadj Max: 3.3
• Storage:
• SD: 1
• User I/O:
• Leds: 8
• Pushbuttons: 5
• Dip Switches: 4
• Rotary Encoders: 1
• Features:
• Power Monitoring: Yes

Device Attributes

Resources

• LUTs: 203,800
• Flip-Flops: 407,600
• Block RAM (36Kb): 445
• DSP Slices: 840
• MMCMs: 10
• HR I/O Pins: 350
• HP I/O Pins: 150
• Transceivers: 16 (GTX, 6.6 Gb/s max)

Vivado

• Tool Part: xc7k325tffg900-2
• ML Standard Support: No

Compatibility

Compatible FMC cards

• Ethernet FMC 2.5V (OP031-2V5) — compatible, slot HPC, verified
• Ethernet FMC 2.5V (OP031-2V5) — compatible, slot LPC, verified
• Ethernet FMC Max (OP080) — compatible, slot HPC, verified
• Quad SFP28 FMC (OP081) — compatible, slot HPC, verified
• Robust Ethernet FMC 2.5V (OP041-2V5) — compatible, slot HPC, verified
• Robust Ethernet FMC 2.5V (OP041-2V5) — compatible, slot LPC, verified
• Ethernet FMC Max (OP080) — partial, slot LPC, verified
• FPGA Drive FMC Gen4 (OP063) — partial, slot HPC, verified
• FPGA Drive FMC Gen4 (OP063) — partial, slot LPC, verified
• M.2 M-key Stack FMC (OP073) — partial, slot HPC, verified
• M.2 M-key Stack FMC (OP073) — partial, slot LPC, verified
• Quad SFP28 FMC (OP081) — partial, slot LPC, verified
• MCIO PCIe FMC (OP103) — incompatible, slot HPC, vendor
• MCIO PCIe FMC (OP103) — incompatible, slot LPC, vendor
• Ethernet FMC 1.8V (OP031-1V8) — compatible, slot HPC, mechanical
• Ethernet FMC 1.8V (OP031-1V8) — compatible, slot LPC, mechanical
• FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot HPC, mechanical
• FL9627 4-Channel High-Speed AD Module (FL9627) — compatible, slot LPC, mechanical
• Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot HPC, mechanical
• Robust Ethernet FMC 1.8V (OP041-1V8) — compatible, slot LPC, mechanical
• 2x QSFP28 FMC (OP120) — partial, slot HPC, mechanical
• 2x QSFP28 FMC (OP120) — partial, slot LPC, mechanical
• FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot HPC, mechanical
• FMC SpaceWire/SpaceFibre Board Mk3 (FMC-SpaceWire-SpaceFibre-Mk3) — partial, slot LPC, mechanical

Notes

Configuration

FPGA configuration is determined by DIP switch SW13.

Notes:

1. X = don't care 2. 0 = OFF position 3. 1 = ON position 4. Switches 1 and 2 are A25 and A24 respectively and determine which of 4 bitstreams is booted from the Linear BPI flash

--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*