HES-XCVU9P-QDR

HES-XCVU9P-QDR is an FPGA development board from Aldec, built around the XCVU9P-2FLGB2104E.

• MPN: HES-XCVU9P-QDR
• Type: FPGA development board
• Vendor: Aldec
• Device: XCVU9P-2FLGB2104E
• Status: active
• Product page: https://www.aldec.com/en/products/emulation/hes_fpga_boards/virtex_ultrascale_plus/hes_xcvu9p_qdr
• Catalog page: https://boards.fpgadeveloper.com/boards/HES-XCVU9P-QDR
• Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json

Specifications

• Memory:
• Type: QDR-II+; Size Mb: 18; Width Bits: 18
• Type: QDR-II+; Size Mb: 18; Width Bits: 18
• Type: QDR-II+; Size Mb: 18; Width Bits: 18
• Flash:
• Type: QSPI; Size Mb: 64
• Type: QSPI; Size Mb: 64
• EEPROM:
• Interface: I2C; Size Kbits: 64; Part: 24AA64T-I/MNY
• Purpose:
• user_data
• Interface: I2C; Size Kbits: 64; Part: 24AA64T-I/MNY
• Purpose:
• user_data
• Clocking:
• Programmable: Yes
• PCIe:
• Type: Edge; Gen: 3; Lanes: 16
• Networking:
• Qsfp28: 2
• USB Bridge:
• Connector: Mini-B
• Functions:
• jtag
• Sensors:
• Type: temperature; Part: SI7055-A20-IM
• Features:
• Power Monitoring: Yes

Device Attributes

Resources

• LUTs: 1,182,240
• Flip-Flops: 2,364,480
• Block RAM (36Kb): 2,160
• UltraRAM: 960
• DSP Slices: 6,840
• MMCMs: 30
• HP I/O Pins: 716
• Transceivers: 76 (GTY, 28.21 Gb/s max)

Vivado

• Tool Part: xcvu9p-flgb2104-2-e
• ML Standard Support: No

Notes

Memory configuration

This entry documents the standard 432 Mb QDR-II+ build — three 144 Mb QDR-II+ SRAMs, the configuration described by Aldec's published Vivado board definition files (github.com/Aldecinc/HES), which also give the 18-bit width of each QDR-II+ interface.

Aldec's product page also describes a 144 Mb QDR-II+ plus 32 Gb DDR4 build (two 16 Gb devices). Aldec confirms that is a separate product with its own ordering code, not a build option of HES-XCVU9P-QDR; it is not covered by this entry.

FPGA speed grade

The product page names the FPGA as XCVU9P-FLGB2104 without a speed grade. Aldec publishes Vivado board definitions for two board revisions — 1.5-2-E and 1.5-3-E — carrying XCVU9P-2FLGB2104E and XCVU9P-3FLGB2104E respectively, and confirms both speed grades are orderable. This entry lists the -2 grade; specify the grade you need when ordering.

Board naming

HES-XCVU9P-QDR is the official product name and orderable part number. Boards silkscreened HES-HPC-HFT carry Aldec's earlier internal technical name for the same hardware, since superseded.

USB-JTAG

The board carries an on-board JTAG module; programming needs only a USB Mini-B cable, with no external programming pod.

Documentation

Aldec does not publish a user guide or technical specification for this board — the documentation portal requires a login and full documentation is under NDA. This entry is built from the product page, Aldec's published Vivado board files, and details confirmed by Aldec.

--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*