Astria Tile

Astria Tile is an FPGA development board from Adiuvo, built around the XC7S25-1CSGA225C.

• MPN: Astria-Tile
• Type: FPGA development board
• Vendor: Adiuvo
• Device: XC7S25-1CSGA225C
• Status: active
• Price: 300 GBP
• Product page: https://www.adiuvoengineering.com/product-page/astria-embedded-system-tile
• Catalog page: https://boards.fpgadeveloper.com/boards/Astria-Tile
• Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json

Specifications

• Memory:
• Type: PSRAM; Size Mb: 4
• Flash:
• Type: QSPI; Size Mb: 32
• USB Bridge:
• Connector: Micro-B
• Functions:
• jtag
• User I/O:
• Leds: 2

Device Attributes

Resources

• LUTs: 14,600
• Flip-Flops: 29,200
• Block RAM (36Kb): 45
• DSP Slices: 80
• MMCMs: 3
• HR I/O Pins: 150

Vivado

• Tool Part: xc7s25csga225-1
• ML Standard Support: Yes

--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*