Agilex 7 I-Series Transceiver (6x F-Tile)

Agilex 7 I-Series Transceiver (6x F-Tile) is an FPGA development board from Altera, built around the AGIC040R39A1E1VC.

• MPN: DK-SI-AGI040EA
• Type: FPGA development board
• Vendor: Altera
• Device: AGIC040R39A1E1VC
• Status: active
• Price: 14995 USD
• Product page: https://www.altera.com/products/devkit/po-3014/agilex-7-fpga-i-series-transceiver-development-kit-6x-f-tile
• Catalog page: https://boards.fpgadeveloper.com/boards/DK-SI-AGI040EA
• Structured data (JSON): https://boards.fpgadeveloper.com/data/boards.json

Specifications

• Memory:
• Type: DDR4; Size Mb: 16384; Width Bits: 72; Ecc: Yes; Form Factor: dimm
• Type: DDR4; Size Mb: 16384; Width Bits: 72; Ecc: Yes
• Clocking:
• Programmable: Yes
• PCIe:
• Type: MCIO; Gen: 4; Lanes: 4
• Networking:
• SFP: 1
• QSFP: 3
• QSFP Dd: 4
• QSFP Dd800: 1
• OSFP: 1
• USB:
• Connector: Type-B; Speed: 2.0; Role: device
• USB Bridge:
• Connector: Type-B
• Functions:
• jtag
• Expansion:
• FMC:
• Slot: FMCP1; Type: fmcp; Vadj Min: 1.2; Vadj Max: 1.2
• Slot: FMCP2; Type: fmcp; Vadj Min: 1.2; Vadj Max: 1.2
• Features:
• Power Monitoring: Yes

Compatibility

Compatible FMC cards

• 2x QSFP28 FMC (OP120) — compatible, slot FMCP1, mechanical
• 2x QSFP28 FMC (OP120) — compatible, slot FMCP2, mechanical
• Ethernet FMC Max (OP080) — compatible, slot FMCP1, mechanical
• Ethernet FMC Max (OP080) — compatible, slot FMCP2, mechanical
• FPGA Drive FMC Gen4 (OP063) — compatible, slot FMCP1, mechanical
• FPGA Drive FMC Gen4 (OP063) — compatible, slot FMCP2, mechanical
• M.2 M-key Stack FMC (OP073) — compatible, slot FMCP1, mechanical
• M.2 M-key Stack FMC (OP073) — compatible, slot FMCP2, mechanical
• MCIO PCIe FMC (OP103) — compatible, slot FMCP1, mechanical
• MCIO PCIe FMC (OP103) — compatible, slot FMCP2, mechanical
• Quad SFP28 FMC (OP081) — compatible, slot FMCP1, mechanical
• Quad SFP28 FMC (OP081) — compatible, slot FMCP2, mechanical
• RPi Camera FMC (OP068) — compatible, slot FMCP1, mechanical
• RPi Camera FMC (OP068) — compatible, slot FMCP2, mechanical

Notes

VADJ on both FMC+ slots (FMC-A J7, FMC-B J9) is fixed at 1.2 V by a factory-fitted 0 Ω strap to the 1.2 V rail (R1122 / R1180); an unpopulated 0 Ω option (R1123 / R1181) allows re-strapping to 1.8 V by board rework only. There is no jumper and no IPMI-based auto-negotiation — the slots carry 16 FGT transceiver lanes each plus all 34 LA pairs, routed straight to the FPGA's 1.2 V banks in the default build (MAX3378E level translators for a 1.8 V VADJ are present but not populated; using them is a board-rework option paired with the 1.8 V strap). A schematic design note next to the strap warns "SUPPORT ONLY FOR SPECIFIC 1.8V IO STANDARD FMC+ CARDS."

--- *Machine-readable catalog entry from https://boards.fpgadeveloper.com. Full dataset: https://boards.fpgadeveloper.com/llms.txt*